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邓辰辰   助理研究员

交叉创新研究部 光电智能技术

通信地址:北京市海淀区清华大学FIT楼1-403

Email:chenchendeng@tsinghua.edu.cn

 

 

教育背景

2003年9月-2007年7月 北京邮电大学 电子科学与技术 学士

2007年9月-2012年3月 英国牛津大学 电子工程科学 博士

工作履历

2012年12月-2016年1月 清华大学微电子所 博士后

2016年1月-2020年10月 清华大学微电子所 高级工程师

2020年11月至今 清华大学信息国家研究中心 助理研究员

研究领域

光电逻辑运算芯片、可重构密码计算芯片和硬件安全芯片

研究概况

主持国家自然科学基金项目,参与863计划、核高基重大专项、科技部重点研发等项目,在重要国际期刊和会议上发表论文20余篇。

学术成果

部分期刊论文:

[1] Deng C, Wang B, Liu L, Zhu M, Wu Y, Li H, Yin S, Wei S, “A 60 Gb/s-Level Coarse-Grained Reconfigurable Cryptographic Processor with Less than 1-W Power”; in IEEE Transactions on Circuits and Systems II: Express Briefs. vol. 67, no. 2, pp. 375-379, Feb. 2020.

[2] Deng C, Liu L, Liu Y, Yin S, Wei S, “PMCC: Fast and Accurate System-Level Power Modeling for Processors on Heterogeneous SoC”, in IEEE Transactions on Circuits and Systems II: Express Briefs, vol.64, no. 5, pp.540-544, May 2017.

 [3] Liu L, Wang B, Deng C*, Zhu M, Yin S and Wei S, “Anole: A Highly Efficient Dynamically Reconfigurable Crypto-Processor for Symmetric-Key Algorithms”, in Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on , vol.37, no.12, Dec. 2018.

[4] Liu L, Wang J,Zhu J, Deng C*,Yin S and Wei S, “TLIA: Efficient Reconfigurable Architecture for Control-Intensive Kernels with Triggered-Long-Instructions”, in Parallel and Distributed Systems, IEEE Transactions on , vol.27, no.7, pp.2143-2154, July 1 2016.

[5] Liu L, Wu C, Deng C*; Yin S, Wu Q, Han J and Wei S, “A Flexible Energy- and Reliability-Aware Application Mapping for NoC-Based Reconfigurable Architectures”, in Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.23, no.11, pp.2566-2580, Nov. 2015.

[6] Liu L, Zhang W, Deng C*; Yin S, and Wei S, “BriGuard: a lightweight indoor intrusion detection system based on infrared light spot displacement”, in Science, Measurement & Technology, IET , vol.9, no.3, pp.306-314, 5 2015.

[7] Liu L, Chen Y, Deng C*, Yin S and Wei S, “Implementation of In-Loop Filter for HEVC Decoder on Reconfigurable Processor”, IET Image Processing, vol.11, no. 9, September 2017.

[8] Liu L, Deng C*, Li Z, Yin S and Wei S, “Reconfigurable Computing System: A Project-based Course for Graduate Students” International Journal of Engineering Education, vol.33, no.2(A), pp.622-628, March 2017.

[9] Wu C, Deng C, Liu L, Han J, Chen J, Yin S and Wei S, “A Multi-Objective Model Oriented Mapping Approach for NoC-based Computing Systems”, in Parallel and Distributed Systems, IEEE Transactions on, vol.28. no.3, pp.662-676, March 1 2017.

[10] Wu C, Deng C, Liu L, Han J, Chen J, Yin S and Wei S, “An Efficient Application Mapping Approach for the Co-Optimization of Reliability, Energy, and Performance in Reconfigurable NoC Architectures”, in Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on , vol.34, no.8, pp.1264-1277, Aug. 2015.

[11] Wu C, Deng C, Liu L, Yin S, Han J and Wei S, “Reliability-aware mapping for various NoC topologies and routing algorithms under performance constraints,” SCIENCE CHINA Information Sciences, 2015, 58 :082401(14).

[12] Wang B, Liu L, Deng C, Zhu M, Yin S and Wei S, “Against Double Fault Attacks: Injection Effort Model, Space and Time Randomization Based Countermeasures for Reconfigurable Array Architecture”, in IEEE Transactions on Information Forensics and Security, vol. 11, no. 6, pp. 1151-1164, June 2016.

[13] Wang B, Liu L, Deng C, Zhu M, Yin S, Zhou Z and Wei S, “Exploration of Benes Network in Cryptographic Processors: A Random Infection Countermeasure for Block Ciphers Against Fault Attacks”, in IEEE Transactions on Information Forensics and Security, vol.12, no.2, pp. 309 – 322, Feb. 2017.

[14] Ouyang P, Yin S, Deng C, Liu L and Wei S, “A fast face detection architecture for auto-focus in smart-phones and digital cameras”, SCIENCE CHINA Information Sciences,vol.59, no.12, pp.122402, 2016.

[15] Liu L, Li Z, Yang C, Deng C, Yin S and Wei S, “HReA: An Energy-Efficient Embedded Dynamically Reconfigurable Fabric for 13-Dwarfs Processing”, in IEEE Transactions on Circuits and System II: Express Briefs, vol. 65, no. 3, pp. 381-385, March 2018.

[16] Wu Y, Liu L, Wang L, Wang X, Han J, Deng C and Wei S, “Aggressive Fine-Grained Power Gating of NoC Buffers”, in Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on,vol. 39, no. 11, pp. 3177-3189, Nov. 2020.

[17] Zhu Y, Zhu M, Yang B, Zhu W, Deng C, Chen C, Wei S, L Liu, “LWRpro: An Energy-efficient Configurable Crypto-Processor for Module-LWR”, in IEEE Transactions on Circuits and Systems I: Regular paper,vol. 68, no. 3, pp. 1146 - 1159, March. 2021.

[18] Zhu J, Luo A, Li G, Zhang B, Wang Y, Shan G, Li Y, Pan J, Deng C, Yin S, Wei S, Liu L, “Jintide: Utilizing Low-Cost Reconfigurable External Monitors to Substantially Enhance Hardware Security of Large-scale CPU Clusters”, IEEE Journal of Solid-State Circuits, vol. 56, no. 8, August 2021.

部分会议论文:

[1] Deng C, Liu L, Li Z, Yin S and Wei S, “Teach Reconfigurable Computing using mixed-grained fabrics based hardware infrastructure”, 2014 IEEE Frontiers in Education Conference (FIE).

[2] Deng C and Collins S, “Sensitivity Enhancement Using a Nonlinear Resonator”, 2010 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

[3] Deng C, Turnbull R, Anthony C, Ward M and Collins S, “A Non-linear Resonator for Sensing Applications”, 2010 Eurosensor XXIV Conference.

[4] Deng C and Collins S, “The Transient Response of a Duffing Resonator following a Parameter Change”, 2009 IEEE International Midwest Symposium on Circuits and systems (MWSCAS).

[5] Liu L, Zhang W, Deng C *, Yin S and Wei S, “SURFEX: A 57fps 1080p resolution 220mW silicon implementation for simplified speeded-up robust feature with 65nm process”, 2013 IEEE Custom Integrated Circuits Conference (CICC).

[6] Liu L, Ren Y, Deng C*; Yin S, Wei S and Han J, “A novel approach using a minimum cost maximum flow algorithm for fault-tolerant topology reconfiguration in NoC architectures”, 2015 20th Asia and South Pacific Design Automation Conference (ASP-DAC).

[7] Liu L, Deng C, Zhu M, Yin S, Cao P and Wei S, “An Energy-Efficient Coarse-Grained Dynamically Reconfigurable Fabric for Multiple-Standard Video Decoding Applications”, 2013 IEEE Custom Integrated Circuits Conference (CICC).

[8] Liu Y, Deng C, Liu L, Yin S and Wei S, “System level power modeling of reconfigurable processor using the least square method”, 2014 IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).

[9] Wang Q, Liu L, Zhu W, Mo H, Deng C and Wei S, “A 700fps Optimized Coarse-to-Fine Shape Searching Based Hardware Accelerator for Face Alignment”, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

[10] Lu Y, Liu L, Deng Y, Weng J, Li Z, Deng C and Wei S, “Minimizing Pipeline Stalls in Distributed-Controlled Coarse-Grained Reconfigurable Arrays with Triggered Instruction Issue and Execution”, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).

[11] Yuan H, Guo W, Chang C, Cao Y, Wei S, Yin S, Deng C, Liu L, Ge W and Zhang F, “A Reliable Physical Unclonable Function Based on Differential Charging Capacitors”, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

[12] Wang L, Liu L, Wang X, Han J, Deng C, Wei S, “CDRing: Reconfigurable Ring Architecture by Exploiting Cycle Decomposition of Torus Topology”. 2020 57th ACM/EDAC/IEEE Design Automation Conference (DAC).